Product Development Engineer job opportunity at Altera Corporation.

Home Jobs In United States Of America Tag: Job Product Development Engineer position at Altera Corporation


DatePosted 10 Days Ago bot
Altera Corporation Product Development Engineer
Experience: 3-years
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation San Jose, California, United States, United States Of America
loacation San Jose, Cali..........United States Of America

Job Details: Job Description: About the Role: The Manufacturing Content Development Engineering Group is responsible for architecting, developing, validating and productizing high quality manufacturing test content for FPGAs to screen out any manufacturing defects and thus guarantees the highest quality of outgoing parts to customers. Other responsibilities of the Product Development Engineer include but are not limited to: Develop and implement DFT strategies for FPGAs, including scan insertion, and interconnect testing to test all the routing. Develop and maintain ATPG (Automatic Test Pattern Generation), Interconnect Test Generation, Programmable Logic Test Generation, and other manufacturing test content flows and scripts. Collaborate with RTL design and verification teams to ensure testability features are embedded efficiently. Define and implement test plans, patterns, and fault models to ensure optimal test coverage and yield. Perform pre-silicon test pattern simulation and validation to ensure test effectiveness prior to tape-out. Analyze test results, debug silicon failures, and provide root cause analysis. Work with manufacturing and test teams to optimize test time, cost, and quality. Analyze early customer returns with emphasis on driving test hole closure activities. Drive test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations. Stay updated with industry trends and emerging DFT/test technologies. Salary Range   The pay range below is for Bay Area California only. Actual salary may vary based on   a number of   factors including job location, job-related knowledge, skills, experiences,   trainings , etc. We also offer incentive opportunities that reward employees based on individual and company performance.    $101,600 - $146,000   USD     We use artificial intelligence to screen, assess, or select applicants for the position.   Applicants must be eligible for any required U.S. export authorizations .   Qualifications: Minimum Qualifications: BS/MS in Electrical Engineering, or equivalent (or other related Engineering degree) with 3+ years of industry experience in the following: Experience in IC design and IC test. Experience in DFT methodologies such as scan chains, ATPG, boundary scan, IJTAG and JTAG networks Test development tools (e.g., TessentIJTAG, FastScan, Tessent Shell etc). Experience with RTL design, synthesis, and verification flows. Experience with fault grading, test time analysis, test coverage analysis, and test yield enhancement. Scripting skills in Python, Perl, TCL, or similar. Semiconductor manufacturing test processes. Digital and analog circuit fundamentals. Post-silicon experience including pattern conversion, Automated Test Equipment (ATE) pattern bring-up and silicon characterization is a plus. Job Type: Regular Shift: Shift 1 (United States of America) Primary Location: San Jose, California, United States Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Other Ai Matches

Senior Technical Writer Applicants are expected to have a solid experience in handling Job related tasks
Firmware Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Penang FP&A Leader Applicants are expected to have a solid experience in handling Job related tasks
FPGA Board Farm Lead Engineer Applicants are expected to have a solid experience in handling Job related tasks
Custom Design Methodology and Automation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Business Analyst - Record to Report Applicants are expected to have a solid experience in handling Job related tasks
Workday Contractor Applicants are expected to have a solid experience in handling Job related tasks
Experienced Analog Designer Applicants are expected to have a solid experience in handling Job related tasks
Principal FPGA Compiler Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior FPGA Compiler Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Principal Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Oracle Fusion ERP Logistics Business Analyst Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Post Silicon FW and System Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Compensation Analyst-Contract Applicants are expected to have a solid experience in handling Job related tasks
Product Development Engineer (Test Program Development) Applicants are expected to have a solid experience in handling Job related tasks
Principal Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
Product Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Oracle Fusion ERP OTC Architect Applicants are expected to have a solid experience in handling Job related tasks
Enterprise Sr/Straff DevOps Developer Applicants are expected to have a solid experience in handling Job related tasks
FPGA Silicon Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
FPGA Compiler Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
Supply Chain Planning Analyst Applicants are expected to have a solid experience in handling Job related tasks