Logic Design Engineer job opportunity at Altera Corporation.



DateMore Than 30 Days Ago bot
Altera Corporation Logic Design Engineer
Experience: 10-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Haifa, Israel, Israel
loacation Haifa, Israel....Israel

Job Details: Job Description: Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies. We are driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure. Our mission is to empower engineers to design and deploy advanced systems with unmatched flexibility and performance. We are seeking a talented Logic Design Engineer to develop and optimize mixed-signal and high-speed IPs for integration into full-chip designs. In this role, you will: Design and Develop: Create logic design, RTL, and simulation for IP blocks, functional units, and subsystems. Architectural Contribution: Participate in defining architecture and microarchitecture features for the designed block. Mixed-Signal Expertise: Apply advanced strategies, tools, and methods for mixed-signal designs, including analog behavior modeling and circuit simulation, to write RTL and optimize logic. Performance Optimization: Ensure designs meet power, performance, area, and timing goals while maintaining integrity for physical implementation. Verification and Quality Assurance: Review verification plans, validate design features, and implement corrective measures for failing RTL tests. Customer Support: Collaborate with SoC customers to ensure seamless integration and high-quality IP delivery. Qualifications: Minimum of 10 years of industry experience delivering complex, high-performance integrated solutions and driving them through mass production. Proven expertise in SerDes and PHY design, including RTL development and firmware implementation, is highly advantageous. Strong background in interfacing with communication standards and optimizing serial link chip architectures for power, performance, and area targets. Hands-on post-silicon experience in validating and refining design outputs through debugging and corrective measures. Additional experience contributing to system architecture definition and applying digital signal processing techniques is considered a plus. B.Sc. or M.Sc. in Electrical Engineering. Job Type: Regular Shift: Shift 1 (Israel) Primary Location: Haifa, Israel Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Other Ai Matches

FPGA Development Tools Engineer Applicants are expected to have a solid experience in handling Job related tasks
High Level Synthesis Compiler Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Strategic Sales Account Manager Applicants are expected to have a solid experience in handling Job related tasks
Experienced Analog Designer Applicants are expected to have a solid experience in handling Job related tasks
FPGA Circuit Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior FPGA Security Architect– Aerospace, Defense & Government Applicants are expected to have a solid experience in handling Defense & Government related tasks
Product Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sr. Fabric Data Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Product Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Firmware Developer Applicants are expected to have a solid experience in handling Job related tasks
Senior DFT Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Executive Administrative Assistant Applicants are expected to have a solid experience in handling Job related tasks
FPGA Silicon Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Graduate Intern Applicants are expected to have a solid experience in handling Job related tasks
Functional Safety Architect Applicants are expected to have a solid experience in handling Job related tasks
FPGA Silicon Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Graduate Talent - Applications Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sr. Fabric Data Engineer Applicants are expected to have a solid experience in handling Job related tasks
Quartus Strategic Planner Applicants are expected to have a solid experience in handling Job related tasks
SOC/FPGA Design Verification Engineering Lead/Manager Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Business Development Manager Applicants are expected to have a solid experience in handling Job related tasks