Principal Hardware Design Engineer - PCB Board Level Circuit Design Simulation Test job opportunity at Marvell Technology, Inc..



DatePosted 6 Days Ago bot
Marvell Technology, Inc. Principal Hardware Design Engineer - PCB Board Level Circuit Design Simulation Test
Experience: 7-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeBachelor's (B.A.)
loacation Santa Clara, CA, United States Of America
loacation Santa Clara, C..........United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Design and architecture for Central Engineering hardware, Hardware development for on-board subsystems to support chip test infrastructure. You will participate in hardware board development, lab testing and chip level bring up activities. Central Engineering is the center hub providing advanced silicon IP to be used by all the other fast growing business units including Data Center, Enterprise, Optics, Custom Computing, Storage and Networking. You’ll be part of the printed circuit board (PCB) engineering team designing hardware for many different projects at Marvell. Marvell is developing state of the art complex chips and hardware for Data Center applications and you will be exposed to leading edge technologies and have the opportunity be part of this high growth and innovative environment. What You Can Expect Create and review schematics and PCB layout and provide design constraints to layout. Evaluate and select new components such as power supplies, power FETs, low jitter Clocks, logic IC, etc. Create spice simulation test benches for power and control circuits. Collaborate with internal firmware/software teams on implementing board level and Chip diagnostics using Python. Lab bring up and board level test/debug on new PCB hardware. FPGA designs using Verilog. What We're Looking For Bachelor CE/EE degree (MS preferred) in Electrical Engineering, with 7+ years of experience in data communication systems or similar field. Must have experience in board level circuit design, simulation and hands-on test and board bringup. Proficiency in OrCad Capture, Cadence Allegro, Python environments. Strong Knowledge in signal and power integrity for high speed PCB designs for network applications. Understanding of the PCB fab and assembly processes for engineering protos. Proficiency with lab test equipment (Scopes, VNA, TDR). knowledge in FPGA and Verilog a plus Ability to communicate well and work closely and cross-functionally with engineering groups in resolving issues Expected Base Pay Range (USD) 150,680 - 225,700, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity  To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-AR3

Other Ai Matches

Senior Staff Engineer, Analog IC Design Applicants are expected to have a solid experience in handling Analog IC Design related tasks
Sr. Principal Engineer, Advanced Packaging Applicants are expected to have a solid experience in handling Advanced Packaging related tasks
Manager of Procurement - semiconductor manufacturing/OSAT Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Analog Mixed-Signal Design - Optical Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Digital Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Firmware Engineer -PCIe post silicon bring up, function validations, protocol Applicants are expected to have a solid experience in handling function validations, protocol related tasks
Senior Principal Engineer - Networking/Switching Silicon Semiconductor AI Infrastructure Embedded Firmware Applicants are expected to have a solid experience in handling Job related tasks
Sr. Staff Global Mobility & Immigration Specialist Applicants are expected to have a solid experience in handling Job related tasks
Technical Director, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Director Product Security Applicants are expected to have a solid experience in handling Job related tasks
Senior Director Product Line Management - CPO Applicants are expected to have a solid experience in handling Job related tasks
Digital Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Advanced Packaging Engineer - SI/PI Applicants are expected to have a solid experience in handling Job related tasks
Sr. Staff Engineer, Analog IC Design Applicants are expected to have a solid experience in handling Analog IC Design related tasks
Staff to Senior Staff Engineer, DFT Applicants are expected to have a solid experience in handling DFT related tasks
AI Developer Platforms (Security) Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Engineer, Principal Applicants are expected to have a solid experience in handling Principal related tasks
Memory Layout Staff Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sr. Staff Physical Verification CAD engineer Applicants are expected to have a solid experience in handling Job related tasks
Director Hardware Application Engineering Applicants are expected to have a solid experience in handling Job related tasks
Staff Firmware Engineer - high-speed interconnects /custom silicon/ASIC design / microcontroller architectures / Applicants are expected to have a solid experience in handling Job related tasks
Analog IC Design, Staff Engineer Applicants are expected to have a solid experience in handling Staff Engineer related tasks
Distinguished Engineer, Verification Applicants are expected to have a solid experience in handling Verification related tasks