Senior Design Verification engineer job opportunity at Marvell Technology, Inc..



DateMore Than 30 Days Ago bot
Marvell Technology, Inc. Senior Design Verification engineer
Experience: 7-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Petah-Tikva, Israel
loacation Petah-Tikva....Israel

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact We are a highly skilled development team of talented engineers, driving the development of Marvell's next-generation network switches. Our team is responsible for a wide range of IPs for switching products, from initial definition through architecture, design, and verification What You Can Expect Drive functional verification of complex networking blocks using UVM/SystemVerilog. Develop and maintain advanced verification components and testbenches. Collaborate with cross-functional teams including architecture, design, firmware, and post-silicon. Contribute to methodology and infrastructure improvements in a dynamic and innovative environment. What We're Looking For B.Sc. or M.Sc. in Electrical/Computer Engineering 7+ years of hands-on experience in ASIC/RTL verification Strong background in SystemVerilog and UVM methodology Deep understanding of coverage-driven verification, object-oriented programming, and constrained random testing Excellent problem-solving skills and self-learning ability Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity  To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-AO1

Other Ai Matches

Senior Principal Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Staff Analog Mixed-Signal IC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Principal Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff to Senior Staff Engineer, DFT Applicants are expected to have a solid experience in handling DFT related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
IT Internal Audit Senior Manager Applicants are expected to have a solid experience in handling Job related tasks
Staff DFT Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff to Senior Staff Engineer Design Verification Applicants are expected to have a solid experience in handling Job related tasks
Graduate Research Intern – Signal Integrity & Packaging Design - Masters Degree Applicants are expected to have a solid experience in handling Job related tasks
Principal Engineer - Memory Compiler Circuit Design Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Engineer - Senior Principal Applicants are expected to have a solid experience in handling Job related tasks
Silicon Validation Engineer Junior/Intern Applicants are expected to have a solid experience in handling Job related tasks
Pricipal System Engineer/PCB Design - CPU/SoC Devices Applicants are expected to have a solid experience in handling Job related tasks
Shanghai_Staff Optical Module Hardware Engineer, FAE Applicants are expected to have a solid experience in handling FAE related tasks
Optical Engineer, Senior Staff Applicants are expected to have a solid experience in handling Senior Staff related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Principal Applications Engineering - Network Validation Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer SW/FW Engineer Applicants are expected to have a solid experience in handling Job related tasks
Quality Systems Engineer Intern - Bachelors Degree Applicants are expected to have a solid experience in handling Job related tasks
Senior Financial Analyst Applicants are expected to have a solid experience in handling Job related tasks
Design Verification/Design Intern - Bachelor's Degree (Fall 2026) Applicants are expected to have a solid experience in handling Job related tasks
Staff Engineer- Firmware Development (HDD) Applicants are expected to have a solid experience in handling Job related tasks