System Engineer - Optical DSP Intern - PhD job opportunity at Marvell Technology, Inc..



DateMore Than 30 Days Ago bot
Marvell Technology, Inc. System Engineer - Optical DSP Intern - PhD
Experience: 1-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Irvine, CA, United States Of America
loacation Irvine, CA....United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact The Connectivity Business Group develops digital signal processing chips for leading-edge optical interfaces. The products designed by this group require state of the art digital signal processing and FEC techniques and the highest speed analog, digital and optical interfaces in the industry. What You Can Expect Understanding coherent optical signal processing Modelling/simulation/analysis of coherent systems including analog components (ADC, DAC, drivers, TIA), opto-electronic components (nested MZM, coherent optical mixers, photodiodes, lasers, optical mux/demux, optical amplifiers), fiber impairments (CD, PMD, non-linearities) and DSP algorithms (calibration of analog and optical nonidealities, equalizers, carrier frequency/phase recovery, timing recovery) Work with lab equipment (spectrum analyzers, VOA, ASE generators etc) What We're Looking For Candidate MUST be currently pursuing a BS/MS/PhD (preferred) degree in CS/EE or related technical field(s) 0-1 years of previous experience A strong signal processing/digital communications background is required. Strong programming skills in Python/Matlab/C/C++, in a Unix type environment, with good problem solving skills Excellent verbal and written communication skills Additional background in coherent optical systems, optical components and silicon photonic integration knowledge is highly desired. Experience with debugging complex analog issues to improve system performance is highly desired. Knowledge of digital design and DSP blocks will be a huge plus. Expected Base Pay Range (USD) 29 - 57, $ per hour. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity   As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.   Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SC1

Other Ai Matches

Senior Principal Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Staff Analog Mixed-Signal IC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Principal Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff to Senior Staff Engineer, DFT Applicants are expected to have a solid experience in handling DFT related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
IT Internal Audit Senior Manager Applicants are expected to have a solid experience in handling Job related tasks
Staff DFT Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff to Senior Staff Engineer Design Verification Applicants are expected to have a solid experience in handling Job related tasks
Graduate Research Intern – Signal Integrity & Packaging Design - Masters Degree Applicants are expected to have a solid experience in handling Job related tasks
Principal Engineer - Memory Compiler Circuit Design Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Engineer - Senior Principal Applicants are expected to have a solid experience in handling Job related tasks
Silicon Validation Engineer Junior/Intern Applicants are expected to have a solid experience in handling Job related tasks
Pricipal System Engineer/PCB Design - CPU/SoC Devices Applicants are expected to have a solid experience in handling Job related tasks
Shanghai_Staff Optical Module Hardware Engineer, FAE Applicants are expected to have a solid experience in handling FAE related tasks
Optical Engineer, Senior Staff Applicants are expected to have a solid experience in handling Senior Staff related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Principal Applications Engineering - Network Validation Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer SW/FW Engineer Applicants are expected to have a solid experience in handling Job related tasks
Quality Systems Engineer Intern - Bachelors Degree Applicants are expected to have a solid experience in handling Job related tasks
Senior Financial Analyst Applicants are expected to have a solid experience in handling Job related tasks
Design Verification/Design Intern - Bachelor's Degree (Fall 2026) Applicants are expected to have a solid experience in handling Job related tasks
Staff Engineer- Firmware Development (HDD) Applicants are expected to have a solid experience in handling Job related tasks