Staff Design Verification Engineer job opportunity at Renesas Electronics.



Date2026-04-27T20:05:24.726Z bot
Renesas Electronics Staff Design Verification Engineer
Experience: General
Pattern: Full-time
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degreeGeneral
loacation Austin, TEXAS, United States Of America
loacation Austin, TEXAS....United States Of America
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Job Description• Plan the verification of complex SoC & design blocks by fully understanding the design specification• Interact with design/system engineers to identify important verification scenarios• Create and enhance constrained-random verification environments using System Verilog.• Create and support UVM compliant test-bench architecture• Formally verify designs with SVA and industry leading formal tools• Identify and write various coverage metrics for stimulus and corner-cases• Build reusable DV infrastructure components for both block and top-level environments• Debug tests in collaboration with design engineering staff• Build verification tools for system automation, regressions, and reporting

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